SRAM and Flash-based FPGA testing and mitigation solutions
Sterpone Luca
Politecnico di Torino, Italy
Abstract
Radiation effects on VLSI technology are provoked when radiation particles such as neutrons, protons or heavy ions hit a sensitive region of the integrated circuits. Due to the progressive technology scaling, VLSI devices are becoming, more and more vulnerable to Single Event Effects (SEEs) and are subject to cumulative ionizing damage known as Total Ionization Dose (TID). This presentation will firstly describe the state-of-the-art methodologies used for analyzing the impact of radiation effects on modern SRAM and Flash-based FPGAs by means of Computer Aided Design (CAD) tools and secondly, it will describe the state-of-the-art CAD design techniques for their mitigation.
References
[1] L. Sterpone et al., "A Novel Error Rate Estimation Approach for UltraScale+ SRAM-based FPGAs," 2018 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), Edinburgh, 2018, pp. 120-126.
[2] S. Azimi, B. Du, L. Sterpone, D. M. Codinachs and L. Cattaneo, "SETA: A CAD Tool for Single Event Transient Analysis and Mitigation on Flash-Based FPGAs," 2018 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Prague, 2018, pp. 1-52.
[3] L. Bozzoli and L. Sterpone, "COMET: a Configuration Memory Tool to Analyze, Visualize and Manipulate FPGAs Bitstream," ARCS Workshop 2018; 31th International Conference on Architecture of Computing Systems, Braunschweig, Germany, 2018, pp. 1-4.
[4] L. Sterpone and S. Azimi, "Radiation-induced SET on Flash-based FPGAs: Analysis and Filtering Methods," ARCS 2017; 30th International Conference on Architecture of Computing Systems, Vienna, Austria, 2017, pp. 1-6.
[5] M. S. Reorda, L. Sterpone and A. Ullah, "An Error-Detection and Self-Repairing Method for Dynamically and Partially Reconfigurable Systems," in IEEE Transactions on Computers, vol. 66, no. 6, pp. 1022-1033, 1 June 2017.